----------------
Name	AMD10000Controller
Initialized	Yes
Enabled	Yes
Aperature Mode	1 
WSRV: Support	Supported
IOP: Support	Supported
IOP: Activity	Active
AGDC: Support	Supported
AGDC: Registered	Registered
Primary Display	255 
Connection Seed	1
Memory (Video)	17163091968 Bytes ( 16368 MB )
Memory (Aperture)	268435456 Bytes ( 256 MB )
Memory (Reserved)	3145728 Bytes ( 3 MB )
Memory (Reg Aperture)	524288 Bytes ( 512 KB )
Device Info	device: 6861, A11
Current V.Clk 0	108000 kHz
Current V.Clk 1	108000 kHz
Current Memory Clock	500 MHz
Current Engine Clock	851 MHz
MASK: Supported Connect Flags	0x304
MASK: Disabled Connectors	0
MASK: Disabled Connections	0
MASK: Connectors Changed	0
MASK: Drivers Pending Changes	0
MASK: DriversPendingASetMode	0
MASK: ActiveInternalConnector	0
Temperature	34 C
Num Framebuffers	6
Mirrored	No
Registered Displays	0
Registered Displays (DP)	0
Registered Displays (DIG)	0 - Map: 0
Registered VRAM	0 Bytes ( 0 MB )
Power Play Ceiling	0
Power Play Floor	0
Power Play Forced	0
Power Play Supported	Yes
Power Play Thermal	No
Chip Device Id	0x6861
Chip ATI Rev	0x1
Boot S.Clk	8519 MHz
Boot M.Clk	9449 MHz
Min D.Clk 0	0 MHz
Min D.Clk 1	0 MHz
Spread Spectrum	sclk:0 (per cent)
Cursor Bytes	0xc0000
Apple RGB MUX	No
Apple MUX State	0 (0:CRTC, 1:TV)
Project Name	AMD,RadeonFramebuffer
Power Play	DICT	8
	Power Levels	min:0, max:15, count:16
	Current Power Level	hw:0, sw:0
	TDP Table	min:0, max:170, count:16
	TDP HW Limit	170
	Initialized	YES
	Is Asleep	NO
	ForceMaxClocks	NO
	AllDisplaysInSync	NO
ASIC Info	DICT	11
	Famild ID	141
	Device ID	0x6861
	ATI Revision Number	1
	Emulated Revision Number	2
	PCI Revision ID	0
	PCI Address	22:0:0
	FB Base	0xf400000000
	FB Top	0xf7fe000000
	MEM SIZE: Local Framebuffer	16368 MB
	MEM SIZE: Aperture	256 MB
	MEM SIZE: Register Aperture	512 KB
Shared Surface Info	DICT	6
	Shared Surface @ 0	DICT	8
		Mode	0
		Master Index	0
		Controller Map	0
		Controller Num	0
		Rotation Flags	0
		Number of Tiles	0 x 0
		Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
		Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
	Shared Surface @ 1	DICT	8
		Mode	0
		Master Index	0
		Controller Map	0
		Controller Num	0
		Rotation Flags	0
		Number of Tiles	0 x 0
		Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
		Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
	Shared Surface @ 2	DICT	8
		Mode	0
		Master Index	0
		Controller Map	0
		Controller Num	0
		Rotation Flags	0
		Number of Tiles	0 x 0
		Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
		Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
	Shared Surface @ 3	DICT	8
		Mode	0
		Master Index	0
		Controller Map	0
		Controller Num	0
		Rotation Flags	0
		Number of Tiles	0 x 0
		Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
		Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
	Shared Surface @ 4	DICT	8
		Mode	0
		Master Index	0
		Controller Map	0
		Controller Num	0
		Rotation Flags	0
		Number of Tiles	0 x 0
		Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
		Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
	Shared Surface @ 5	DICT	8
		Mode	0
		Master Index	0
		Controller Map	0
		Controller Num	0
		Rotation Flags	0
		Number of Tiles	0 x 0
		Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
		Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
Interrupts	DICT	18
	Interrupt Port0	DICT	 30
		Interrupt Port1	DICT	 30
			Interrupt Port2	DICT	 30
				Interrupt Port3	DICT	 30
					Interrupt Port4	DICT	 30
						Interrupt Port5	DICT	 30
							Line Buffers	DICT	6
								LineBuffers @ 0	DICT	9
									LB Index	0
									LB Offset	0 (0)
									LB Size	24595 (0x6013)
									Using 100 %	Yes
									Current LB Depth	4 (30 bpp)
									Number of Entries	5124
									Line Buffer Capabilities	0xf
									HW State @ 0	DICT	5
										Source Window	0 x 0
										Destination Window	0 x 0
										Scaling Taps	0 x 0
										Line Buffer Depth	4 - 30 bpp
										Interlaced	No
									SW State @ 0	DICT	5
										Source Window	0 x 0
										Destination Window	0 x 0
										Scaling Taps	0 x 0
										Line Buffer Depth	4 - 30 bpp
										Interlaced	No
								LineBuffers @ 1	DICT	9
									LB Index	1
									LB Offset	2048 (0x800)
									LB Size	24595 (0x6013)
									Using 100 %	Yes
									Current LB Depth	4 (30 bpp)
									Number of Entries	5124
									Line Buffer Capabilities	0xf
									HW State @ 1	DICT	5
										Source Window	0 x 0
										Destination Window	0 x 0
										Scaling Taps	0 x 0
										Line Buffer Depth	4 - 30 bpp
										Interlaced	No
									SW State @ 1	DICT	5
										Source Window	0 x 0
										Destination Window	0 x 0
										Scaling Taps	0 x 0
										Line Buffer Depth	4 - 30 bpp
										Interlaced	No
								LineBuffers @ 2	DICT	9
									LB Index	2
									LB Offset	4096 (0x1000)
									LB Size	24595 (0x6013)
									Using 100 %	Yes
									Current LB Depth	4 (30 bpp)
									Number of Entries	5124
									Line Buffer Capabilities	0xf
									HW State @ 2	DICT	5
										Source Window	0 x 0
										Destination Window	0 x 0
										Scaling Taps	0 x 0
										Line Buffer Depth	4 - 30 bpp
										Interlaced	No
									SW State @ 2	DICT	5
										Source Window	0 x 0
										Destination Window	0 x 0
										Scaling Taps	0 x 0
										Line Buffer Depth	4 - 30 bpp
										Interlaced	No
								LineBuffers @ 3	DICT	9
									LB Index	3
									LB Offset	6144 (0x1800)
									LB Size	24595 (0x6013)
									Using 100 %	Yes
									Current LB Depth	4 (30 bpp)
									Number of Entries	5124
									Line Buffer Capabilities	0xf
									HW State @ 3	DICT	5
										Source Window	0 x 0
										Destination Window	0 x 0
										Scaling Taps	0 x 0
										Line Buffer Depth	4 - 30 bpp
										Interlaced	No
									SW State @ 3	DICT	5
										Source Window	0 x 0
										Destination Window	0 x 0
										Scaling Taps	0 x 0
										Line Buffer Depth	4 - 30 bpp
										Interlaced	No
								LineBuffers @ 4	DICT	9
									LB Index	4
									LB Offset	8192 (0x2000)
									LB Size	24595 (0x6013)
									Using 100 %	Yes
									Current LB Depth	4 (30 bpp)
									Number of Entries	5124
									Line Buffer Capabilities	0xf
									HW State @ 4	DICT	5
										Source Window	0 x 0
										Destination Window	0 x 0
										Scaling Taps	0 x 0
										Line Buffer Depth	4 - 30 bpp
										Interlaced	No
									SW State @ 4	DICT	5
										Source Window	0 x 0
										Destination Window	0 x 0
										Scaling Taps	0 x 0
										Line Buffer Depth	4 - 30 bpp
										Interlaced	No
								LineBuffers @ 5	DICT	9
									LB Index	5
									LB Offset	10240 (0x2800)
									LB Size	24595 (0x6013)
									Using 100 %	Yes
									Current LB Depth	4 (30 bpp)
									Number of Entries	5124
									Line Buffer Capabilities	0xf
									HW State @ 5	DICT	5
										Source Window	0 x 0
										Destination Window	0 x 0
										Scaling Taps	0 x 0
										Line Buffer Depth	4 - 30 bpp
										Interlaced	No
									SW State @ 5	DICT	5
										Source Window	0 x 0
										Destination Window	0 x 0
										Scaling Taps	0 x 0
										Line Buffer Depth	4 - 30 bpp
										Interlaced	No
							Connector Assigner	DICT	14
								
----------------
Name	AMD10000Controller
Initialized	Yes
Enabled	Yes
Aperature Mode	1 
WSRV: Support	Supported
IOP: Support	Supported
IOP: Activity	Active
AGDC: Support	Supported
AGDC: Registered	Registered
Primary Display	0 
Connection Seed	1
Memory (Video)	34342961152 Bytes ( 32752 MB )
Memory (Aperture)	268435456 Bytes ( 256 MB )
Memory (Reserved)	3145728 Bytes ( 3 MB )
Memory (Reg Aperture)	524288 Bytes ( 512 KB )
Device Info	device: 66a3, A11
Current V.Clk 0	0 kHz
Current V.Clk 1	0 kHz
Current Memory Clock	1000 MHz
Current Engine Clock	0 MHz
MASK: Supported Connect Flags	0x304
MASK: Disabled Connectors	0
MASK: Disabled Connections	0
MASK: Connectors Changed	0x2
MASK: Drivers Pending Changes	0
MASK: DriversPendingASetMode	0
MASK: ActiveInternalConnector	0
Temperature	0 C
Num Framebuffers	6
Mirrored	No
Registered Displays	2
Registered Displays (DP)	2
Registered Displays (DIG)	2 - Map: 0x3
Registered VRAM	166330368 Bytes ( 158 MB )
Power Play Ceiling	0
Power Play Floor	0
Power Play Forced	0
Power Play Supported	Yes
Power Play Thermal	No
Chip Device Id	0x66a3
Chip ATI Rev	0x1
Boot S.Clk	0 MHz
Boot M.Clk	10000 MHz
Min D.Clk 0	0 MHz
Min D.Clk 1	0 MHz
Spread Spectrum	sclk:0 (per cent)
Cursor Bytes	0xc0000
Apple RGB MUX	No
Apple MUX State	0 (0:CRTC, 1:TV)
Project Name	Donguil
Power Play	DICT	8
	Power Levels	min:0, max:15, count:16
	Current Power Level	hw:0, sw:0
	TDP Table	min:90, max:300, count:16
	TDP HW Limit	200
	Initialized	YES
	Is Asleep	NO
	ForceMaxClocks	NO
	AllDisplaysInSync	NO
ASIC Info	DICT	11
	Famild ID	141
	Device ID	0x66a3
	ATI Revision Number	1
	Emulated Revision Number	41
	PCI Revision ID	0
	PCI Address	14:0:0
	FB Base	0x8800000000
	FB Top	0x8fffffffff
	MEM SIZE: Local Framebuffer	32752 MB
	MEM SIZE: Aperture	256 MB
	MEM SIZE: Register Aperture	512 KB
Shared Surface Info	DICT	6
	Shared Surface @ 0	DICT	10
		Mode	0x80000019
		Master Index	0
		Controller Map	0x3
		Controller Num	0x2
		Rotation Flags	0x50
		Number of Tiles	2 x 1
		Tile2Crtc Map	0:0, 1:1, 2:255, 3:255, 4:255, 5:255.
		Crtc2Tile Map	0:0, 1:1, 2:255, 3:255, 4:255, 5:255.
		Shared Surface @ 1	DICT	8
			Mode	0
			Master Index	0
			Controller Map	0
			Controller Num	0
			Rotation Flags	0
			Number of Tiles	0 x 0
			Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
			Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
		Shared Surface @ 2	DICT	8
			Mode	0
			Master Index	0
			Controller Map	0
			Controller Num	0
			Rotation Flags	0
			Number of Tiles	0 x 0
			Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
			Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
	Shared Surface @ 3	DICT	8
		Mode	0
		Master Index	0
		Controller Map	0
		Controller Num	0
		Rotation Flags	0
		Number of Tiles	0 x 0
		Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
		Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
	Shared Surface @ 4	DICT	8
		Mode	0
		Master Index	0
		Controller Map	0
		Controller Num	0
		Rotation Flags	0
		Number of Tiles	0 x 0
		Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
		Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
	Shared Surface @ 5	DICT	8
		Mode	0
		Master Index	0
		Controller Map	0
		Controller Num	0
		Rotation Flags	0
		Number of Tiles	0 x 0
		Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
		Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
	Interrupts	DICT	18
		Interrupt Port0	DICT	 30
			Interrupt Port1	DICT	 30
				Interrupt Port2	DICT	 30
					Interrupt Port3	DICT	 30
						Interrupt Port4	DICT	 30
							Interrupt Port5	DICT	 30
								Line Buffers	DICT	6
									LineBuffers @ 0	DICT	10
										LB Index	0
										LB Offset	0 (0)
										LB Size	24595 (0x6013)
										Using 100 %	Yes
										Max Number of Lines	8
										Current LB Depth	4 (30 bpp)
										Number of Entries	5124
										Line Buffer Capabilities	0xf
										HW State @ 0	DICT	5
											Source Window	3008 x 3384
											Destination Window	3008 x 3384
											Scaling Taps	1 x 1
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
										SW State @ 0	DICT	5
											Source Window	3008 x 3384
											Destination Window	3008 x 3384
											Scaling Taps	1 x 1
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
									LineBuffers @ 1	DICT	10
										LB Index	1
										LB Offset	2048 (0x800)
										LB Size	24595 (0x6013)
										Using 100 %	Yes
										Max Number of Lines	8
										Current LB Depth	4 (30 bpp)
										Number of Entries	5124
										Line Buffer Capabilities	0xf
										HW State @ 1	DICT	5
											Source Window	3008 x 3384
											Destination Window	3008 x 3384
											Scaling Taps	1 x 1
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
										SW State @ 1	DICT	5
											Source Window	3008 x 3384
											Destination Window	3008 x 3384
											Scaling Taps	1 x 1
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
									LineBuffers @ 2	DICT	9
										LB Index	2
										LB Offset	4096 (0x1000)
										LB Size	24595 (0x6013)
										Using 100 %	Yes
										Current LB Depth	4 (30 bpp)
										Number of Entries	5124
										Line Buffer Capabilities	0xf
										HW State @ 2	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
										SW State @ 2	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
									LineBuffers @ 3	DICT	9
										LB Index	3
										LB Offset	6144 (0x1800)
										LB Size	24595 (0x6013)
										Using 100 %	Yes
										Current LB Depth	4 (30 bpp)
										Number of Entries	5124
										Line Buffer Capabilities	0xf
										HW State @ 3	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
										SW State @ 3	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
									LineBuffers @ 4	DICT	9
										LB Index	4
										LB Offset	8192 (0x2000)
										LB Size	24595 (0x6013)
										Using 100 %	Yes
										Current LB Depth	4 (30 bpp)
										Number of Entries	5124
										Line Buffer Capabilities	0xf
										HW State @ 4	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
										SW State @ 4	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
									LineBuffers @ 5	DICT	9
										LB Index	5
										LB Offset	10240 (0x2800)
										LB Size	24595 (0x6013)
										Using 100 %	Yes
										Current LB Depth	4 (30 bpp)
										Number of Entries	5124
										Line Buffer Capabilities	0xf
										HW State @ 5	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
										SW State @ 5	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
								Connector Assigner	DICT	14
									Connector@0	DICT	39
										Is Online	Yes
										Active Connection Type	DP
										Connected Connection Type	DP
										Current Panel Type	DIGITAL
										Supported Connection	0x304
										Use hw i2c	No
										Link Sense Line	DDC 6
										Link UNIPHY	UNIPHY A
										Link DIG Number	DIG A
										Link HPD Num	HPD 5
										Type	DISPLAY PORT
										Active CRTCs	0: A 
										Connected drivers	0: 0 
										Connected CRTCs	0:0 
										Required ScanOuts	0:1 Total:1.
										Change Event	 -1 
										Priority Index	0
										PLL Index	6
										Has EDID	Yes
										Is EMC Display	No
										Use Internal	No
										Use Internal EDID Caching	No
										Use Single Link Only	Yes
										Use RGB On YUV	No
										Use Backlight	No
										Use Clamshell	No
										Use Hdcp	Yes
										Supports DP MST	Yes
										Use Apple RGB MUX	No
										Use DAC Auto Calibration	No
										Forced to CRTC Number	CRTC 1
										Forced to DIG_FE for MST Device	DIG_FE B
										Connector Features	0x2023010100
										Current DP Train Params 0	DICT	15
											DisplayPort Version	12
											Link Lanes	4 {4,4}
											Link Rate (Mbps)	8100 {8100,8100}
											Link Bits	30 {24,30}
											Voltage Swing (Level)	{2,2,2,2}
											Pre-Emphasis (Level)	{0,0,0,0}
											Spread	Enabled
											Enhanced Framing	Enabled
											Scrambler	Enabled
											MST	Disabled
											No Mst	YES
											Force Training Times	YES
											Force Framing	YES
											Force Bit-Depth Range	YES
											Force EQ Training Pattern	YES
										Target DP Train Params 0	DICT	15
											DisplayPort Version	12
											Link Lanes	4 {4,4}
											Link Rate (Mbps)	8100 {8100,8100}
											Link Bits	30 {24,30}
											Voltage Swing (Level)	{0,0,0,0}
											Pre-Emphasis (Level)	{0,0,0,0}
											Spread	Enabled
											Enhanced Framing	Enabled
											Scrambler	Enabled
											MST	Disabled
											No Mst	YES
											Force Training Times	YES
											Force Framing	YES
											Force Bit-Depth Range	YES
											Force EQ Training Pattern	YES
										Active Info 00 0	DICT	16
											Connected	Yes
											Dual Link	No
											Coherent	No
											MST	No
											Connection Type	DP
											Pixel Clock	648910 kHz
											Lane Count	4
											Link Clock	810000 kHz
											Link Bits	30 bpc
											CRTC Index	0
											PLL Index	6
											Backlight Freq	0 Hz
											Link Format	RGB
											DIG FE	A
											Number of Devices	1
											Timing	DICT	21
												Display Mode	8000300f
												Refresh Rate (Calculated)	60 Hz
												Refresh Rate (Stored)	0.0 Hz
												Window (Active)	3008 x 3384
												Window (Scaled)	3384 x 6016
												Scaled Inset	0 x 0
												Pixel Clock	648912960 Hz
												Scaler Flags	0x50
												Signal Config	0
												Blanking	68 x 132
												Border {left,right}	{0, 0}
												Border {top,bottom}	{0, 0}
												Sync Offset (h, v)	8 x 118
												Sync Pulse Width (h, v)	32, 8
												Sync Config (h, v)	+ x -
												Num Links	0
												VB Extension	0
												Pixel Encoding	1 (RGB444)
												Bits Per Color Component	4 (10 bpc)
												Colorimetry	1 (RGB)
												Dynamic Range	2 (HDR10)
										Connector@1	DICT	39
											Is Online	Yes
											Active Connection Type	DP
											Connected Connection Type	DP
											Current Panel Type	DIGITAL
											Supported Connection	0x304
											Use hw i2c	No
											Link Sense Line	DDC 5
											Link UNIPHY	UNIPHY B
											Link DIG Number	DIG B
											Link HPD Num	HPD 6
											Type	DISPLAY PORT
											Active CRTCs	0: B 
											Connected drivers	0: 1 
											Connected CRTCs	0:1 
											Required ScanOuts	0:1 Total:1.
											Change Event	 -1 
											Priority Index	1
											PLL Index	6
											Has EDID	Yes
											Is EMC Display	No
											Use Internal	No
											Use Internal EDID Caching	No
											Use Single Link Only	Yes
											Use RGB On YUV	No
											Use Backlight	No
											Use Clamshell	No
											Use Hdcp	Yes
											Supports DP MST	Yes
											Use Apple RGB MUX	No
											Use DAC Auto Calibration	No
											Forced to CRTC Number	CRTC 2
											Forced to DIG_FE for MST Device	DIG_FE A
											Connector Features	0x1013020100
											Current DP Train Params 1	DICT	15
												DisplayPort Version	12
												Link Lanes	4 {4,4}
												Link Rate (Mbps)	8100 {8100,8100}
												Link Bits	30 {24,30}
												Voltage Swing (Level)	{2,2,2,2}
												Pre-Emphasis (Level)	{0,0,0,0}
												Spread	Enabled
												Enhanced Framing	Enabled
												Scrambler	Enabled
												MST	Disabled
												No Mst	YES
												Force Training Times	YES
												Force Framing	YES
												Force Bit-Depth Range	YES
												Force EQ Training Pattern	YES
											Target DP Train Params 1	DICT	15
												DisplayPort Version	12
												Link Lanes	4 {4,4}
												Link Rate (Mbps)	8100 {8100,8100}
												Link Bits	30 {24,30}
												Voltage Swing (Level)	{0,0,0,0}
												Pre-Emphasis (Level)	{0,0,0,0}
												Spread	Enabled
												Enhanced Framing	Enabled
												Scrambler	Enabled
												MST	Disabled
												No Mst	YES
												Force Training Times	YES
												Force Framing	YES
												Force Bit-Depth Range	YES
												Force EQ Training Pattern	YES
											Active Info 00 1	DICT	16
												Connected	Yes
												Dual Link	No
												Coherent	No
												MST	No
												Connection Type	DP
												Pixel Clock	648910 kHz
												Lane Count	4
												Link Clock	810000 kHz
												Link Bits	30 bpc
												CRTC Index	1
												PLL Index	6
												Backlight Freq	0 Hz
												Link Format	RGB
												DIG FE	B
												Number of Devices	1
												Timing	DICT	21
													Display Mode	a00
													Refresh Rate (Calculated)	60 Hz
													Refresh Rate (Stored)	0.0 Hz
													Window (Active)	3008 x 3384
													Window (Scaled)	6016 x 3384
													Scaled Inset	0 x 0
													Pixel Clock	648912960 Hz
													Scaler Flags	0x50
													Signal Config	0
													Blanking	68 x 132
													Border {left,right}	{0, 0}
													Border {top,bottom}	{0, 0}
													Sync Offset (h, v)	8 x 118
													Sync Pulse Width (h, v)	32, 8
													Sync Config (h, v)	+ x -
													Num Links	0
													VB Extension	0
													Pixel Encoding	1 (RGB444)
													Bits Per Color Component	4 (10 bpc)
													Colorimetry	1 (RGB)
													Dynamic Range	2 (HDR10)
											
----------------
Name	AMD10000Controller
Initialized	Yes
Enabled	Yes
Aperature Mode	1 
WSRV: Support	Supported
IOP: Support	Supported
IOP: Activity	Active
AGDC: Support	Supported
AGDC: Registered	Registered
Primary Display	0 
Connection Seed	1
Memory (Video)	34342961152 Bytes ( 32752 MB )
Memory (Aperture)	268435456 Bytes ( 256 MB )
Memory (Reserved)	3145728 Bytes ( 3 MB )
Memory (Reg Aperture)	524288 Bytes ( 512 KB )
Device Info	device: 66a3, A11
Current V.Clk 0	0 kHz
Current V.Clk 1	0 kHz
Current Memory Clock	1000 MHz
Current Engine Clock	0 MHz
MASK: Supported Connect Flags	0x304
MASK: Disabled Connectors	0
MASK: Disabled Connections	0
MASK: Connectors Changed	0
MASK: Drivers Pending Changes	0
MASK: DriversPendingASetMode	0
MASK: ActiveInternalConnector	0
Temperature	0 C
Num Framebuffers	6
Mirrored	No
Registered Displays	3
Registered Displays (DP)	3
Registered Displays (DIG)	3 - Map: 0x31
Registered VRAM	300023808 Bytes ( 286 MB )
Power Play Ceiling	0
Power Play Floor	0
Power Play Forced	0
Power Play Supported	Yes
Power Play Thermal	No
Chip Device Id	0x66a3
Chip ATI Rev	0x1
Boot S.Clk	0 MHz
Boot M.Clk	10000 MHz
Min D.Clk 0	0 MHz
Min D.Clk 1	0 MHz
Spread Spectrum	sclk:0 (per cent)
Cursor Bytes	0xc0000
Apple RGB MUX	No
Apple MUX State	0 (0:CRTC, 1:TV)
Project Name	Donguil
Power Play	DICT	8
	Power Levels	min:0, max:15, count:16
	Current Power Level	hw:0, sw:0
	TDP Table	min:90, max:100, count:16
	TDP HW Limit	200
	Initialized	YES
	Is Asleep	NO
	ForceMaxClocks	NO
	AllDisplaysInSync	NO
ASIC Info	DICT	11
	Famild ID	141
	Device ID	0x66a3
	ATI Revision Number	1
	Emulated Revision Number	41
	PCI Revision ID	0
	PCI Address	11:0:0
	FB Base	0x8000000000
	FB Top	0x87ffffffff
	MEM SIZE: Local Framebuffer	32752 MB
	MEM SIZE: Aperture	256 MB
	MEM SIZE: Register Aperture	512 KB
Shared Surface Info	DICT	6
	Shared Surface @ 0	DICT	10
		Mode	0x80000019
		Master Index	4
		Controller Map	0x30
		Controller Num	0x2
		Rotation Flags	0
		Number of Tiles	2 x 1
		Tile2Crtc Map	0:4, 1:5, 2:255, 3:255, 4:255, 5:255.
		Crtc2Tile Map	0:255, 1:255, 2:255, 3:255, 4:0, 5:1.
		Shared Surface @ 1	DICT	10
			Mode	0x80000059
			Master Index	0
			Controller Map	0x3
			Controller Num	0x2
			Rotation Flags	0
			Number of Tiles	2 x 1
			Tile2Crtc Map	0:0, 1:1, 2:255, 3:255, 4:255, 5:255.
			Crtc2Tile Map	0:0, 1:1, 2:255, 3:255, 4:255, 5:255.
			Shared Surface @ 2	DICT	8
				Mode	0
				Master Index	0
				Controller Map	0
				Controller Num	0
				Rotation Flags	0
				Number of Tiles	0 x 0
				Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
				Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
			Shared Surface @ 3	DICT	8
				Mode	0
				Master Index	0
				Controller Map	0
				Controller Num	0
				Rotation Flags	0
				Number of Tiles	0 x 0
				Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
				Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
		Shared Surface @ 4	DICT	8
			Mode	0
			Master Index	0
			Controller Map	0
			Controller Num	0
			Rotation Flags	0
			Number of Tiles	0 x 0
			Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
			Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
	Shared Surface @ 5	DICT	8
		Mode	0
		Master Index	0
		Controller Map	0
		Controller Num	0
		Rotation Flags	0
		Number of Tiles	0 x 0
		Tile2Crtc Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
		Crtc2Tile Map	0:0, 1:0, 2:0, 3:0, 4:0, 5:0.
	Interrupts	DICT	18
		Interrupt Port0	DICT	 30
			Interrupt Port1	DICT	 30
				Interrupt Port2	DICT	 30
					Interrupt Port3	DICT	 30
						Interrupt Port4	DICT	 30
							Interrupt Port5	DICT	 30
								Line Buffers	DICT	6
									LineBuffers @ 0	DICT	10
										LB Index	0
										LB Offset	0 (0)
										LB Size	24595 (0x6013)
										Using 100 %	Yes
										Max Number of Lines	6
										Current LB Depth	4 (30 bpp)
										Number of Entries	5124
										Line Buffer Capabilities	0xf
										HW State @ 0	DICT	5
											Source Window	3840 x 4320
											Destination Window	3840 x 4320
											Scaling Taps	1 x 1
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
										SW State @ 0	DICT	5
											Source Window	3840 x 4320
											Destination Window	3840 x 4320
											Scaling Taps	1 x 1
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
									LineBuffers @ 1	DICT	9
										LB Index	1
										LB Offset	2048 (0x800)
										LB Size	24595 (0x6013)
										Using 100 %	Yes
										Current LB Depth	4 (30 bpp)
										Number of Entries	5124
										Line Buffer Capabilities	0xf
										HW State @ 1	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
										SW State @ 1	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
									LineBuffers @ 2	DICT	9
										LB Index	2
										LB Offset	4096 (0x1000)
										LB Size	24595 (0x6013)
										Using 100 %	Yes
										Current LB Depth	4 (30 bpp)
										Number of Entries	5124
										Line Buffer Capabilities	0xf
										HW State @ 2	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
										SW State @ 2	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
									LineBuffers @ 3	DICT	9
										LB Index	3
										LB Offset	6144 (0x1800)
										LB Size	24595 (0x6013)
										Using 100 %	Yes
										Current LB Depth	4 (30 bpp)
										Number of Entries	5124
										Line Buffer Capabilities	0xf
										HW State @ 3	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
										SW State @ 3	DICT	5
											Source Window	0 x 0
											Destination Window	0 x 0
											Scaling Taps	0 x 0
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
									LineBuffers @ 4	DICT	10
										LB Index	4
										LB Offset	8192 (0x2000)
										LB Size	24595 (0x6013)
										Using 100 %	Yes
										Max Number of Lines	8
										Current LB Depth	4 (30 bpp)
										Number of Entries	5124
										Line Buffer Capabilities	0xf
										HW State @ 4	DICT	5
											Source Window	3008 x 3384
											Destination Window	3008 x 3384
											Scaling Taps	1 x 1
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
										SW State @ 4	DICT	5
											Source Window	3008 x 3384
											Destination Window	3008 x 3384
											Scaling Taps	1 x 1
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
									LineBuffers @ 5	DICT	10
										LB Index	5
										LB Offset	10240 (0x2800)
										LB Size	24595 (0x6013)
										Using 100 %	Yes
										Max Number of Lines	8
										Current LB Depth	4 (30 bpp)
										Number of Entries	5124
										Line Buffer Capabilities	0xf
										HW State @ 5	DICT	5
											Source Window	3008 x 3384
											Destination Window	3008 x 3384
											Scaling Taps	1 x 1
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
										SW State @ 5	DICT	5
											Source Window	3008 x 3384
											Destination Window	3008 x 3384
											Scaling Taps	1 x 1
											Line Buffer Depth	4 - 30 bpp
											Interlaced	No
								Connector Assigner	DICT	14
									Connector@0	DICT	39
										Is Online	Yes
										Active Connection Type	DP
										Connected Connection Type	DP
										Current Panel Type	DIGITAL
										Supported Connection	0x304
										Use hw i2c	No
										Link Sense Line	DDC 6
										Link UNIPHY	UNIPHY A
										Link DIG Number	DIG A
										Link HPD Num	HPD 5
										Type	DISPLAY PORT
										Active CRTCs	0: A 
										Connected drivers	0: 0 
										Connected CRTCs	0:0 
										Required ScanOuts	0:1 Total:1.
										Change Event	 -1 
										Priority Index	0
										PLL Index	6
										Has EDID	Yes
										Is EMC Display	No
										Use Internal	No
										Use Internal EDID Caching	No
										Use Single Link Only	Yes
										Use RGB On YUV	No
										Use Backlight	No
										Use Clamshell	No
										Use Hdcp	Yes
										Supports DP MST	Yes
										Use Apple RGB MUX	No
										Use DAC Auto Calibration	No
										Forced to CRTC Number	CRTC 1
										Forced to DIG_FE for MST Device	DIG_FE B
										Connector Features	0x2023010100
										Current DP Train Params 0	DICT	15
											DisplayPort Version	12
											Link Lanes	4 {4,4}
											Link Rate (Mbps)	8100 {8100,8100}
											Link Bits	24 {24,24}
											Voltage Swing (Level)	{2,2,2,2}
											Pre-Emphasis (Level)	{0,0,0,0}
											Spread	Enabled
											Enhanced Framing	Enabled
											Scrambler	Enabled
											MST	Disabled
											No Mst	YES
											Force Training Times	YES
											Force Framing	YES
											Force Bit-Depth Range	YES
											Force EQ Training Pattern	YES
										Target DP Train Params 0	DICT	15
											DisplayPort Version	12
											Link Lanes	4 {4,4}
											Link Rate (Mbps)	8100 {8100,8100}
											Link Bits	24 {24,24}
											Voltage Swing (Level)	{0,0,0,0}
											Pre-Emphasis (Level)	{0,0,0,0}
											Spread	Enabled
											Enhanced Framing	Enabled
											Scrambler	Enabled
											MST	Disabled
											No Mst	YES
											Force Training Times	YES
											Force Framing	YES
											Force Bit-Depth Range	YES
											Force EQ Training Pattern	YES
										Active Info 00 0	DICT	16
											Connected	Yes
											Dual Link	No
											Coherent	No
											MST	No
											Connection Type	DP
											Pixel Clock	1030250 kHz
											Lane Count	4
											Link Clock	810000 kHz
											Link Bits	24 bpc
											CRTC Index	0
											PLL Index	6
											Backlight Freq	0 Hz
											Link Format	RGB
											DIG FE	A
											Number of Devices	1
											Timing	DICT	21
												Display Mode	80003019
												Refresh Rate (Calculated)	30 Hz
												Refresh Rate (Stored)	0.0 Hz
												Window (Active)	7680 x 4320
												Window (Scaled)	0 x 0
												Scaled Inset	0 x 0
												Pixel Clock	1030250000 Hz
												Scaler Flags	0
												Signal Config	0x2
												Blanking	200 x 48
												Border {left,right}	{0, 3840}
												Border {top,bottom}	{0, 0}
												Sync Offset (h, v)	30 x 3
												Sync Pulse Width (h, v)	10, 5
												Sync Config (h, v)	+ x -
												Num Links	2
												VB Extension	0
												Pixel Encoding	1 (RGB444)
												Bits Per Color Component	2 (8 bpc)
												Colorimetry	1 (RGB)
												Dynamic Range	1 (SDR)
										Connector@4	DICT	39
											Is Online	Yes
											Active Connection Type	DP
											Connected Connection Type	DP
											Current Panel Type	DIGITAL
											Supported Connection	0x304
											Use hw i2c	No
											Link Sense Line	DDC 2
											Link UNIPHY	UNIPHY E
											Link DIG Number	DIG E
											Link HPD Num	HPD 2
											Type	DISPLAY PORT
											Active CRTCs	0: E 
											Connected drivers	0: 4 
											Connected CRTCs	0:4 
											Required ScanOuts	0:1 Total:1.
											Change Event	 -1 
											Priority Index	1
											PLL Index	6
											Has EDID	Yes
											Is EMC Display	No
											Use Internal	No
											Use Internal EDID Caching	No
											Use Single Link Only	Yes
											Use RGB On YUV	No
											Use Backlight	No
											Use Clamshell	No
											Use Hdcp	Yes
											Supports DP MST	Yes
											Use Apple RGB MUX	No
											Use DAC Auto Calibration	No
											Forced to CRTC Number	CRTC 5
											Forced to DIG_FE for MST Device	DIG_FE F
											Connector Features	0x6063050100
											Current DP Train Params 4	DICT	15
												DisplayPort Version	12
												Link Lanes	4 {4,4}
												Link Rate (Mbps)	8100 {8100,8100}
												Link Bits	30 {24,30}
												Voltage Swing (Level)	{1,1,1,1}
												Pre-Emphasis (Level)	{1,1,1,1}
												Spread	Enabled
												Enhanced Framing	Enabled
												Scrambler	Enabled
												MST	Disabled
												No Mst	YES
												Force Training Times	YES
												Force Framing	YES
												Force Bit-Depth Range	YES
												Force EQ Training Pattern	YES
											Target DP Train Params 4	DICT	15
												DisplayPort Version	12
												Link Lanes	4 {4,4}
												Link Rate (Mbps)	8100 {8100,8100}
												Link Bits	30 {24,30}
												Voltage Swing (Level)	{0,0,0,0}
												Pre-Emphasis (Level)	{0,0,0,0}
												Spread	Enabled
												Enhanced Framing	Enabled
												Scrambler	Enabled
												MST	Disabled
												No Mst	YES
												Force Training Times	YES
												Force Framing	YES
												Force Bit-Depth Range	YES
												Force EQ Training Pattern	YES
											Active Info 00 4	DICT	16
												Connected	Yes
												Dual Link	No
												Coherent	No
												MST	No
												Connection Type	DP
												Pixel Clock	648910 kHz
												Lane Count	4
												Link Clock	810000 kHz
												Link Bits	30 bpc
												CRTC Index	4
												PLL Index	6
												Backlight Freq	0 Hz
												Link Format	RGB
												DIG FE	E
												Number of Devices	1
												Timing	DICT	21
													Display Mode	8000300f
													Refresh Rate (Calculated)	60 Hz
													Refresh Rate (Stored)	0.0 Hz
													Window (Active)	3008 x 3384
													Window (Scaled)	6016 x 3384
													Scaled Inset	0 x 0
													Pixel Clock	648912960 Hz
													Scaler Flags	0
													Signal Config	0
													Blanking	68 x 132
													Border {left,right}	{0, 0}
													Border {top,bottom}	{0, 0}
													Sync Offset (h, v)	8 x 118
													Sync Pulse Width (h, v)	32, 8
													Sync Config (h, v)	+ x -
													Num Links	0
													VB Extension	0
													Pixel Encoding	1 (RGB444)
													Bits Per Color Component	4 (10 bpc)
													Colorimetry	1 (RGB)
													Dynamic Range	2 (HDR10)
											Connector@5	DICT	39
												Is Online	Yes
												Active Connection Type	DP
												Connected Connection Type	DP
												Current Panel Type	DIGITAL
												Supported Connection	0x304
												Use hw i2c	No
												Link Sense Line	DDC 1
												Link UNIPHY	UNIPHY F
												Link DIG Number	DIG F
												Link HPD Num	HPD 1
												Type	DISPLAY PORT
												Active CRTCs	0: F 
												Connected drivers	0: 5 
												Connected CRTCs	0:5 
												Required ScanOuts	0:1 Total:1.
												Change Event	 -1 
												Priority Index	2
												PLL Index	6
												Has EDID	Yes
												Is EMC Display	No
												Use Internal	No
												Use Internal EDID Caching	No
												Use Single Link Only	Yes
												Use RGB On YUV	No
												Use Backlight	No
												Use Clamshell	No
												Use Hdcp	Yes
												Supports DP MST	Yes
												Use Apple RGB MUX	No
												Use DAC Auto Calibration	No
												Forced to CRTC Number	CRTC 6
												Forced to DIG_FE for MST Device	DIG_FE E
												Connector Features	0x5053060100
												Current DP Train Params 5	DICT	15
													DisplayPort Version	12
													Link Lanes	4 {4,4}
													Link Rate (Mbps)	8100 {8100,8100}
													Link Bits	30 {24,30}
													Voltage Swing (Level)	{1,1,1,1}
													Pre-Emphasis (Level)	{1,1,1,1}
													Spread	Enabled
													Enhanced Framing	Enabled
													Scrambler	Enabled
													MST	Disabled
													No Mst	YES
													Force Training Times	YES
													Force Framing	YES
													Force Bit-Depth Range	YES
													Force EQ Training Pattern	YES
												Target DP Train Params 5	DICT	15
													DisplayPort Version	12
													Link Lanes	4 {4,4}
													Link Rate (Mbps)	8100 {8100,8100}
													Link Bits	30 {24,30}
													Voltage Swing (Level)	{0,0,0,0}
													Pre-Emphasis (Level)	{0,0,0,0}
													Spread	Enabled
													Enhanced Framing	Enabled
													Scrambler	Enabled
													MST	Disabled
													No Mst	YES
													Force Training Times	YES
													Force Framing	YES
													Force Bit-Depth Range	YES
													Force EQ Training Pattern	YES
												Active Info 00 5	DICT	16
													Connected	Yes
													Dual Link	No
													Coherent	No
													MST	No
													Connection Type	DP
													Pixel Clock	648910 kHz
													Lane Count	4
													Link Clock	810000 kHz
													Link Bits	30 bpc
													CRTC Index	5
													PLL Index	6
													Backlight Freq	0 Hz
													Link Format	RGB
													DIG FE	F
													Number of Devices	1
													Timing	DICT	21
														Display Mode	a00
														Refresh Rate (Calculated)	60 Hz
														Refresh Rate (Stored)	0.0 Hz
														Window (Active)	3008 x 3384
														Window (Scaled)	6016 x 3384
														Scaled Inset	0 x 0
														Pixel Clock	648912960 Hz
														Scaler Flags	0
														Signal Config	0
														Blanking	68 x 132
														Border {left,right}	{0, 0}
														Border {top,bottom}	{0, 0}
														Sync Offset (h, v)	8 x 118
														Sync Pulse Width (h, v)	32, 8
														Sync Config (h, v)	+ x -
														Num Links	0
														VB Extension	0
														Pixel Encoding	1 (RGB444)
														Bits Per Color Component	4 (10 bpc)
														Colorimetry	1 (RGB)
														Dynamic Range	2 (HDR10)
												
